MOSFET Models for SPICE Simulation: Including BSIM3v3 and BSIM4 [ハードカバー]

Anyway, here is the content:

CHAPTER 1 MODELING JARGONS

1-1 SPICE Simulator and SPICE Model 1-2 Numerical Convergence 1-3 Digital and Analog Models 1-4 Smoothing Function and Single Equation 1-5 Chain Rule 1-6 Quasi-Static Approximation 1-7 Terminal Charges and Charge Partition 1-8 Charge Conservation 1-9 Non-Quasi-Static and Quasi-Static y-Parameters 1-10 Source-Referencing and Inverse Modeling 1-11 Physical vs. Table-Lookup Models 1-12 Scalable Model and Device Binning

CHAPTER 2 BASIC FACTS OF BSIM3

2-1 What Is and What's Not Implemented in BSIM3 2-2 D.C. Equivalent Circuit and Leakage Current 2-3 Large-Signal Equivalent Circuit 2-4 Small-Signal Equivalent Circuit and y-Parameters 2-5 Noise Equivalent Circuit 2-6 Special Operating Conditions: VDS < 0, VBS > 0, VGS < 0, or VBD > 0

CHAPTER 3 BSIM3 PARAMETERS

3-1 List of Parameters According to Function 3-2 Alphabetical Glossary of Parameters 3-3 Flow Diagram of SPICE Simulation

CHAPTER 4 IMPROVABLE AREAS OF BSIM3

4-1 Lack of Robust Non-Quasi-Static Model; Transient Analysis 4-2 Problem with the 40/60 Partition: The "Killer NOR Gate" 4-3 Lack of Channel Resistance (NQS Effect; Small-Signal Analysis) 4-4 Incorrect Transconductance Dependency on Frequency 4-5 Lack of Gate Resistance (and Associated Noise) 4-6 Lack of Substrate Distibuted Resistance (and Associated Noise) 4-7 Incorrect Source/Drain Asymmetry at VDS = 0 4-8 Incorrect Cgb Behaviors 4-9 Capacitances with Wrong Signs 4-10 Cgg Fit and Other Capacitance Issues 4-11 Insufficient Noise Modeling (No Excess Short-Channel Thermal Noise) 4-12 Insufficient Noise Modeling (No Channel-Induced Gate Noise) 4-13 Incorrect Noise Figure Behavior 4-14 Inconsistent Input-Referred Noise Behavior 4-15 Possible Negative Transconductances 4-16 Lack of GIDL (Gate Induced Drain Leakage) Current 4-17 Incorrect Subthreshold behaviors 4-18 Threshold Voltage Rollup 4-19 Problems associated with a nonzero RDSW 4-20 Other Nuisances

CHAPTER 5 IMPROVEMENTS IN BSIM4

5-1 Introduction 5-2 Physical and Electrical Oxide Thicknesses 5-3 Strong Inversion Potential For Vertical Nonuniform Doping Profile 5-4 Threshold Voltage Modifications 5-5 VGST,eff In Moderate Inversion 5-6 Drain Conductance Model 5-7 Mobility Model 5-8 Diode Capacitance 5-9 Diode Breakdown 5-10 GIDL (Gate Induced Drain Leakage) Current 5-11 Bias-Dependent Drain-Source Resistance 5-12 Gate Resistance

5-13 Substrate Resistance 5-14 Overlap Capacitance 5-15 Thermal Noise Models 5-16 Flicker Noise Model 5-17 Non-Quasi-Static AC Model 5-18 Gate Tunneling Currents 5-19 Layout-Dependent Parasitics

APPENDIX

A. BSIM3 Equations B. Capacitances and Charges for All Bias Conditions C. Non-Quasi-Static y-parameters D. Fringing Capactiance E. BSIM3 Non-Quasi-Static Modeling F. Noise Figure G. BSIM4 Equations INDEX

I must admit... I haven't read all 588 pages yet, but the sections I have read are all clearly written, well illustrated and there is just enough background information to make the topics interesting. For example when he discusses the possibility of BSIM3 calculating a negative back-gate transconductance, gmb, or a negative mutual transconductance, gm, he points out that a negative gm has actually been reported in a real device, and gives the reference. Then he gives a checklist you can use to help prevent the negative gmb problem in your model.

I was particularly interested and amused by his explanation of the "Killer NOR Gate" in section 4.2 "Problems with the 40/60 Partition." This circuit caused a lot of interesting e-mail discussion a couple of years ago.

His chapter 3 contains a very good 130-page "ALPHABETICAL GLOSSARY OF BSIM3 PARAMETERS." Anybody who works with BSIM3 knows you need a handy list of all the model parameters and what they mean. Liu devotes a couple of paragraphs to each, and he recommends leaving many of them equal to zero!

I'm more of a SPICE model user, not so much a theorist, and I found this book to be exactly what I needed.

The other recent classics on this subject are Cheng & Hu's MOSFET Modeling & BSIM3 User's Guide (1999), Arora's MOSFET Models for VLSI Circuit Simulation (1993) and Foty's MOSFET Modeling with SPICE (1996).