I am a hardware engineer designing an execution unit and find the book to be extremely well-written, providing a comprehensive coverage of both computer arithmetic and Verilog HDL. The theory and architecture for all designs are covered prior to implementing the designs in Verilog.
Before proceeding with this review, I would like to comment on the one-star reviews that were given for this book. The criticisms provided by these reviewers are completely unfounded and obviously inaccurate. This is an excellent, well-written book and all of the material is explained in detail. It is one of the best books available on the topic. The Verilog software is the latest version produced by Silvaco International called the SILOS Simulation Environment and is definitely current. Also, it is obviously extremely unlikely that one of the reviewers contacted all of the other buyers and were told that they bought only this book. These reviewers obviously intended to degrade this book for their own personal agenda. They obviously have not read the book. I am certain that an objective reviewer will agree with the preceding comments.
The book provides a thorough presentation and Verilog designs of fixed-point arithmetic, including both low-speed serial addition/subtraction and high-speed carry lookahead addition/subtraction for the fixed-point number representation. The same is true for fixed-point multiplication, which covers a sequential add-shift multiplier, a Booth algorithm multiplier, and a high-speed array multiplier. A high-speed memory-based multiplier is also presented. Fixed-point division is presented in detail for SRT division, multiplicative division, and a high-speed array divider.
Decimal addition details a design using multiplexers that provide a high-speed operation. There is also a memory-based decimal adder. Decimal subtraction provides the theory and designs for different techniques. Decimal multiplication provides the architecture and Verilog designs using behavioral modeling and structural modeling. There is also a high-speed memory-based multiplier. The book presents the table lookup division technique plus the theory and Verilog designs of the restoring division method.
The chapters on floating-point cover in detail the floating-point format, biased exponents, overflow, underflow, and the theory for addition, subtraction, multiplication, and division. Flowcharts are provided that depict the algorithms utilized for the four arithmetic operations. A Verilog example illustrates using behavioral modeling for floating-point addition. Different Verilog versions are given for floating-point subtraction. Double and zero biases are covered for multiplication and division, respectively, together with different Verilog versions for multiplication.
There is a chapter on additional floating-point topics. These topics include the rounding techniques of truncation, adder-based, and von Neumann rounding. A section on guard bits is also included. Verilog designs are presented for the various rounding methods.
The book provides additional topics on computer arithmetic. These include the theory, architecture, and Verilog designs of residue checking using dataflow modeling and structural modeling. A section on parity checking is also included, complete with theory and Verilog design. Parity prediction, which is a form of checksum error detection, is presented, including the theory, architecture, and Verilog design. Various other logic designs are also included in this chapter.
The book also provides Appendices on the Verilog designs of various combinational logic functions, the event queue used in Verilog, and answers to select problems, which are a tremendous help to students.
The author includes the design module, the test bench module, the outputs, and the waveforms for the arithmetic designs, all of which most other books do not include. The Verilog code is well formatted and easy to read. I highly recommend this book.