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よく一緒に購入されている商品
商品の説明
内容説明
The computing world today is in the middle of a revolution: mobile clients and cloud computing have emerged as the dominant paradigms driving programming and hardware innovation today. The Fifth Edition of Computer Architecture focuses on this dramatic shift, exploring the ways in which software and technology in the cloud are accessed by cell phones, tablets, laptops, and other mobile computing devices. Each chapter includes two real-world examples, one mobile and one datacenter, to illustrate this revolutionary change.
- Updated to cover the mobile computing revolution
- Emphasizes the two most important topics in architecture today: memory hierarchy and parallelism in all its forms.
- Develops common themes throughout each chapter: power, performance, cost, dependability, protection, programming models, and emerging trends ("What's Next")
- Includes three review appendices in the printed text. Additional reference appendices are available online.
- Includes updated Case Studies and completely new exercises.
著者について
John L. Hennessy is the president of Stanford University, where he has been a member of the faculty since 1977 in the departments of electrical engineering and computer science. Hennessy is a fellow of the IEEE and the ACM, a member of the National Academy of Engineering, the National Academy of Science, the American Academy of Arts and Sciences, and the Spanish Royal Academy of Engineering. He received the 2001 Eckert-Mauchly Award for his contributions to RISC technology, the 2001 Seymour Cray Computer Engineering Award, and shared the John von Neumann award in 2000 with David Patterson.
After completing the project in 1984, he took a one-year leave from the university to co-found MIPS Computer Systems, which developed one of the first commercial RISC microprocessors. After being acquired by Silicon Graphics in 1991, MIPS Technologies became an independent company in 1998, focusing on microprocessors for the embedded marketplace. As of 2004, over 300 million MIPS microprocessors have been shipped in devices ranging from video games and palmtop computers to laser printers and network switches.
Hennessy's more recent research at Stanford focuses on the area of designing and exploiting multiprocessors. He helped lead the design of the DASH multiprocessor architecture, the first distributed shared-memory multiprocessors supporting cache coherency, and the basis for several commercial multiprocessor designs, including the Silicon Graphics Origin multiprocessors. Since becoming president of Stanford, revising and updating this text and the more advanced Computer Architecture: A Quantitative Approach has become a primary form of recreation and relaxation.
After completing the project in 1984, he took a one-year leave from the university to co-found MIPS Computer Systems, which developed one of the first commercial RISC microprocessors. After being acquired by Silicon Graphics in 1991, MIPS Technologies became an independent company in 1998, focusing on microprocessors for the embedded marketplace. As of 2004, over 300 million MIPS microprocessors have been shipped in devices ranging from video games and palmtop computers to laser printers and network switches.
Hennessy's more recent research at Stanford focuses on the area of designing and exploiting multiprocessors. He helped lead the design of the DASH multiprocessor architecture, the first distributed shared-memory multiprocessors supporting cache coherency, and the basis for several commercial multiprocessor designs, including the Silicon Graphics Origin multiprocessors. Since becoming president of Stanford, revising and updating this text and the more advanced Computer Architecture: A Quantitative Approach has become a primary form of recreation and relaxation.
David A. Patterson was the first in his family to graduate from college (1969 A.B UCLA), and he enjoyed it so much that he didn't stop until a PhD, (1976 UCLA). After 4 years developing a wafer-scale computer at Hughes Aircraft, he joined U.C. Berkeley in 1977.
He spent 1979 at DEC working on the VAX minicomputer. He and colleagues later developed the Reduced Instruction Set Computer (RISC). By joining forces with IBM's 801 and Stanford's MIPS projects, RISC became widespread. In 1984 Sun Microsystems recruited him to start the SPARC architecture. In 1987, Patterson and colleagues wondered if tried building dependable storage systems from the new PC disks. This led to the popular Redundant Array of Inexpensive Disks (RAID). He spent 1989 working on the CM-5 supercomputer. Patterson and colleagues later tried building a supercomputer using standard desktop computers and switches. The resulting Network of Workstations (NOW) project led to cluster technology used by many startups. He is now working on the Recovery Oriented Computing (ROC) project.
In the past, he served as Chair of Berkeley's CS Division, Chair and CRA. He is currently serving on the IT advisory committee to the U.S. President and has just been elected President of the ACM.
All this resulted in 150 papers, 5 books, and the following honors, some shared with friends: election to the National Academy of Engineering; from the University of California: Outstanding Alumnus Award (UCLA Computer Science Department), McEntyre Award for Excellence in Teaching (Berkeley Computer Science), Distinguished Teaching Award (Berkeley); from ACM: fellow, SIGMOD Test of Time Award, Karlstrom Outstanding Educator Award; from IEEE: fellow, Johnson Information Storage Award, Undergraduate Teaching Award, Mulligan Education Medal, and von Neumann Medal.
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Amazon.com で最も参考になったカスタマーレビュー (beta)
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14 人中、13人の方が、｢このレビューが参考になった｣と投票しています。
An excellent improvement on a Computer Science classic
2011/10/3
形式:ペーパーバック|Amazonが確認した購入
I was sitting in Austin airport last week with a friend who casually mentioned that he was quoted in the latest edition of Computer Architecture. It seemed like only yesterday I was reading the 4th edition, but I was pleasantly surprised by the new release and had a copy rushed over next day. I was not disappointed. Having spent most of the weekend reading the latest edition, I've been extremely impressed thus far. This edition lives up to its heritage, and goes beyond, embracing the industry trends toward "Cloud Computing" (Warehouse Scale Computers - chapter 6 includes an awesome analysis of the Google cluster/array designs and their efficiencies), Task Level Parallelism, and so on. It also goes beyond the 4th edition cleanup, featuring substantially new material in a much more complete overall volume. A sheer joy to read.
30 人中、24人の方が、｢このレビューが参考になった｣と投票しています。
Disappointed
2011/10/20
形式:ペーパーバック
It appears that this book was rushed out by the publisher, *unfinished*.
Core subjects that would normally be chapters in other books, such as "Computer Arithmetic", "Storage Systems", "Large-scale multiprocessors", "Survey of Instructions Set", etc (nine chapters in total ), have been relegated to an "Online Appendices" status, which is a misnomer because as of 2011/10/20 they don't exist at all, even online (a terse "coming soon" appearing on the website).
My suggestions: don't buy the book now, wait until the missing chapters are published and appears in print in the book itself.
If you buy the book now, you will only be able to read a lot of chapters as ".pdf" when they get published, not a pleasant experience in my opinion, and you will also contribute to encourage publishers in this bad practice.
To give you an idea of how bad it is, the number of non-printed chapters (9) is the same as the number of printed chapters (6 + 3 "appendices") and if we can trust the authors themselves: "There are more pages in these appendices (the non-printed ones) than there is in this book" (preface p xvi) !
[Update: 2011/11/01: the appendices are now present on the books web site in pdf. But still no printed paper version of the appendices available or announced]
Core subjects that would normally be chapters in other books, such as "Computer Arithmetic", "Storage Systems", "Large-scale multiprocessors", "Survey of Instructions Set", etc (nine chapters in total ), have been relegated to an "Online Appendices" status, which is a misnomer because as of 2011/10/20 they don't exist at all, even online (a terse "coming soon" appearing on the website).
My suggestions: don't buy the book now, wait until the missing chapters are published and appears in print in the book itself.
If you buy the book now, you will only be able to read a lot of chapters as ".pdf" when they get published, not a pleasant experience in my opinion, and you will also contribute to encourage publishers in this bad practice.
To give you an idea of how bad it is, the number of non-printed chapters (9) is the same as the number of printed chapters (6 + 3 "appendices") and if we can trust the authors themselves: "There are more pages in these appendices (the non-printed ones) than there is in this book" (preface p xvi) !
[Update: 2011/11/01: the appendices are now present on the books web site in pdf. But still no printed paper version of the appendices available or announced]
5 人中、5人の方が、｢このレビューが参考になった｣と投票しています。
An incredible compendium of hardware information.
2012/1/13
形式:ペーパーバック|Amazon Vine™ レビュー
(詳しくはこちら)
Computer architecture offers an in depth view of computer hardware. I have taken a lot of classes on computer hardware and done a lot of reading. This book is far and away the best resource for understanding how hardware works and the mathematical calculations that go into it. I haven't read any of the previous editions.
Authors John L. Hennessy and David Patterson start the reader out with the fundamentals of computer hardware design and take the reader through memory design, parallelisms including instruction level, data level and thread level. The authors give the reader a graphical lay out of parallelism for those that don't fully understand it.
Memory is discussed a lot in this book. The authors talk a lot about memory optimization, design and cache. Hennessy and Patterson walk the reader through complex mathematical equations. The chapter dedicated to memory was my favorite because it was so inclusive of everything that goes into memory allocation and maximizing memory.
The authors also spent a lot of time on processors, multi-threading and understanding that architecture, the process of multi-threading and what true multi-threading is, how multi-threading works and machine instruction sets.
In all of the subjects the authors discuss "Fallacies and pitfalls". This section the Authors use discuss misconceptions and misbeliefs about the topic being discussed in the related chapter which I found interesting and very useful.
After the subject matter that's covered in the chapters there are three appendices in the book and several additional available online which is fine with me. It's a huge book and probably the most cost effective way to produce a paperback version was to put some of the appendices online considering the limited audience this book will have.
While the subject matter is complex the Authors had a writing style and format that made everything fairly easy to understand. This book is not for the beginner. The reader will have to have a god understanding of how hardware works and you will have to love to do math as I do. After reading Computer architecture a quantitative approach i have a much better understanding how computer hardware works at it core.
Very well written and researched, 5 stars
Authors John L. Hennessy and David Patterson start the reader out with the fundamentals of computer hardware design and take the reader through memory design, parallelisms including instruction level, data level and thread level. The authors give the reader a graphical lay out of parallelism for those that don't fully understand it.
Memory is discussed a lot in this book. The authors talk a lot about memory optimization, design and cache. Hennessy and Patterson walk the reader through complex mathematical equations. The chapter dedicated to memory was my favorite because it was so inclusive of everything that goes into memory allocation and maximizing memory.
The authors also spent a lot of time on processors, multi-threading and understanding that architecture, the process of multi-threading and what true multi-threading is, how multi-threading works and machine instruction sets.
In all of the subjects the authors discuss "Fallacies and pitfalls". This section the Authors use discuss misconceptions and misbeliefs about the topic being discussed in the related chapter which I found interesting and very useful.
After the subject matter that's covered in the chapters there are three appendices in the book and several additional available online which is fine with me. It's a huge book and probably the most cost effective way to produce a paperback version was to put some of the appendices online considering the limited audience this book will have.
While the subject matter is complex the Authors had a writing style and format that made everything fairly easy to understand. This book is not for the beginner. The reader will have to have a god understanding of how hardware works and you will have to love to do math as I do. After reading Computer architecture a quantitative approach i have a much better understanding how computer hardware works at it core.
Very well written and researched, 5 stars
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